What is GDT/LDT/IDT/TSS

GDT, LDT, IDT and TSS are all data structures specified by Intel x86 architecture in memory management module.

GDT, Global Descriptor Table, is used to define the characteristics of the various memory areas used during program execution, including the base address, the size and access privileges like executability and writability. These memory areas are called segments in Intel terminology. (From Wikipedia) Segment is a term for memory management in Intel x86 architecture, which is also used collaboratively with paging mechanism.

LDT, Local Descriptor Table, acts similar to GDT, which also saves segments descriptor. The main differences between GDT and LDT is: 1) GDT have only one copy in system while LDT can have many, 2) GDT may not changed during execution which LDT often changes when task switches, 3) entry of LDT is save in GDT. Entries in GDT and LDT have the same structure.

IDT, Interrupt Descriptor Table, is a data structure used by the x86 architecture to implement an interrupt vector table. The IDT is used by the processor to determine the correct response to interrupts and exceptions. Use of the IDT is triggered by three types of events: hardware interrupts, software interrupts, and processor exceptions, which together are referred to as "interrupts". The IDT consists of 256 interrupt vectors–the first 32 (0-31 or 00-1F) of which are reserved for processor exceptions. (From Wikipedia)

TSS, Task State Segment, is a special structure on x86-based computers which holds information about a task. It is used by the operating system kernel for task management. The TSS may reside anywhere in memory. A special segment register called the task register (TR) holds a segment selector that points to a valid TSS segment descriptor which resides in the GDT (a TSS descriptor may not reside in the LDT). The TSS may contain saved values of all the x86 registers. This is used for task switching. The operating system may load the TSS with the values of the registers that the new task needs and after executing a hardware task switch (such as with an IRET instruction) the x86 CPU will load the saved values from the TSS into the appropriate registers.

Note that only IDT is necessary for a CPU running normally. But actually, GDT is also used to store globally shared memory message. LDT is actually not used in Linux (every task used a shared default LDT). TSS is also used the same as LDT -- all tasks use a shared TSS. Before Linux 2.4, TSS is used for task switching. But every entry of TSS and LDT should be saved in GDT, which limits the total task numbers in the system. Linux uses software mechanism to manage task switching.