Feedback after weekly sync

There are some feedback from Jan after sync of this weekend.

1. Preemption timer: Currently "save preemption timer value on exit" is not supported, so preempt exit from L2->L0 cannot trace its preemption timer value and preemption timer value is reset when L0->L2. But L2->L0->L1 is not one case of L2->L1 exit, so preemption timer value should be kept.
1. Write test case for this bug.
2. Write "save preemption timer value on exit" support for KVM and nested KVM.
2. Instruction interception: Refine the codes using table-driven structure.
3. CR0/4 shadowing has some big problems
1. Some of flags are "owned" by L1 and some are shadowed. Check owned flags with vcpu->arch.cr0_guest_owned_bits and vcpu->arch.cr4_guest_owned_bits.
2. Write a test where in once case L1 shadows the bit and in the other it leave it to L2.
3. For CR0, we can test TS (owned by L1) and MP (shadow); for CR4, we can test DE (owned by L1) and TSD (shadow).
4. PAT and EFER looks good
5. For I/O bitmap: Needs to change the test cases totally.
1. Test low parts and high parts
2. Test in and out
3. Test access width
4. Test pass and trap, and "partial" pass or trap
5. Test corner cases: 0x0, 0x7FFF, 0x8000, 0xFFFF, overruns (4-bytes on address 0x7FFF, and 0xFFFF)